#[repr(C)]pub struct VcpuSregs {Show 17 fields
pub cs: VcpuSegment,
pub ds: VcpuSegment,
pub es: VcpuSegment,
pub fs: VcpuSegment,
pub gs: VcpuSegment,
pub ss: VcpuSegment,
pub tr: VcpuSegment,
pub ldt: VcpuSegment,
pub gdt: VcpuDescTable,
pub idt: VcpuDescTable,
pub cr0: u64,
pub cr2: u64,
pub cr3: u64,
pub cr4: u64,
pub efer: u64,
pub apic_base: u64,
pub interrupt_bitmap: [u64; 4],
}Expand description
Guest special-register state.
Fields§
§cs: VcpuSegmentThe code segment.
ds: VcpuSegmentThe data segment.
es: VcpuSegmentThe extra data segment.
fs: VcpuSegmentThe FS segment, including the IA32_FS_BASE MSR value.
gs: VcpuSegmentThe GS segment, including the IA32_GS_BASE MSR value.
ss: VcpuSegmentThe stack segment.
tr: VcpuSegmentThe task register and its cached segment descriptor.
ldt: VcpuSegmentThe local descriptor-table register and its cached segment descriptor.
gdt: VcpuDescTableThe global descriptor-table register.
idt: VcpuDescTableThe interrupt descriptor-table register.
cr0: u64The CR0 control register.
cr2: u64The page-fault linear address.
cr3: u64The page-table root and control bits.
cr4: u64The CR4 control register.
efer: u64The extended feature enable register.
apic_base: u64The local APIC base address and control bits.
interrupt_bitmap: [u64; 4]The pending interrupt vectors, with one bit per vector.
Trait Implementations§
impl Copy for VcpuSregs
impl Eq for VcpuSregs
impl StructuralPartialEq for VcpuSregs
Auto Trait Implementations§
impl Freeze for VcpuSregs
impl RefUnwindSafe for VcpuSregs
impl Send for VcpuSregs
impl Sync for VcpuSregs
impl Unpin for VcpuSregs
impl UnsafeUnpin for VcpuSregs
impl UnwindSafe for VcpuSregs
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