pub enum CachePolicy {
Uncacheable,
WriteCombining,
WriteProtected,
Writethrough,
Writeback,
}Expand description
A type to control the cacheability of the main memory.
The type currently follows the definition as defined by the AMD64 manual.
Variants§
Uncacheable
Uncacheable (UC).
Reads from, and writes to, UC memory are not cacheable. Reads from UC memory cannot be speculative. Write-combining to UC memory is not allowed. Reads from or writes to UC memory cause the write buffers to be written to memory and be invalidated prior to the access to UC memory.
The UC memory type is useful for memory-mapped I/O devices where strict ordering of reads and writes is important.
WriteCombining
Write-Combining (WC).
Reads from, and writes to, WC memory are not cacheable. Reads from WC memory can be speculative.
Writes to this memory type can be combined internally by the processor and written to memory as a single write operation to reduce memory accesses.
The WC memory type is useful for graphics-display memory buffers where the order of writes is not important.
WriteProtected
Write-Protect (WP).
Reads from WP memory are cacheable and allocate cache lines on a read miss. Reads from WP memory can be speculative.
Writes to WP memory that hit in the cache do not update the cache. Instead, all writes update memory (write to memory), and writes that hit in the cache invalidate the cache line. Write buffering of WP memory is allowed.
The WP memory type is useful for shadowed-ROM memory where updates must be immediately visible to all devices that read the shadow locations.
Writethrough
Writethrough (WT).
Reads from WT memory are cacheable and allocate cache lines on a read miss. Reads from WT memory can be speculative.
All writes to WT memory update main memory, and writes that hit in the cache update the cache line. Writes that miss the cache do not allocate a cache line. Write buffering of WT memory is allowed.
Writeback
Writeback (WB).
The WB memory is the “normal” memory. See detailed descriptions in the manual.
This type of memory provides the highest-possible performance and is useful for most software and data stored in system memory (DRAM).
Trait Implementations§
Source§impl Clone for CachePolicy
impl Clone for CachePolicy
Source§fn clone(&self) -> CachePolicy
fn clone(&self) -> CachePolicy
1.0.0 (const: unstable) · Source§fn clone_from(&mut self, source: &Self)
fn clone_from(&mut self, source: &Self)
source. Read moreSource§impl Debug for CachePolicy
impl Debug for CachePolicy
Source§impl PartialEq for CachePolicy
impl PartialEq for CachePolicy
Source§fn eq(&self, other: &CachePolicy) -> bool
fn eq(&self, other: &CachePolicy) -> bool
self and other values to be equal, and is used by ==.