mod dma_coherent;
mod dma_stream;
use alloc::collections::BTreeSet;
pub use dma_coherent::DmaCoherent;
pub use dma_stream::{DmaDirection, DmaStream, DmaStreamSlice};
use inherit_methods_macro::inherit_methods;
use spin::Once;
use super::Paddr;
use crate::{arch::iommu::has_iommu, mm::PAGE_SIZE, sync::SpinLock};
pub type Daddr = usize;
#[derive(PartialEq)]
pub enum DmaType {
    Direct,
    Iommu,
}
#[derive(Debug)]
pub enum DmaError {
    InvalidArgs,
    AlreadyMapped,
}
pub trait HasDaddr {
    fn daddr(&self) -> Daddr;
}
#[inherit_methods(from = "(**self)")]
impl<T: HasDaddr> HasDaddr for &T {
    fn daddr(&self) -> Daddr;
}
static DMA_MAPPING_SET: Once<SpinLock<BTreeSet<Paddr>>> = Once::new();
pub fn dma_type() -> DmaType {
    if has_iommu() {
        DmaType::Iommu
    } else {
        DmaType::Direct
    }
}
pub fn init() {
    DMA_MAPPING_SET.call_once(|| SpinLock::new(BTreeSet::new()));
}
fn check_and_insert_dma_mapping(start_paddr: Paddr, num_pages: usize) -> bool {
    let mut mapping_set = DMA_MAPPING_SET.get().unwrap().lock_irq_disabled();
    start_paddr.checked_add(num_pages * PAGE_SIZE).unwrap();
    for i in 0..num_pages {
        let paddr = start_paddr + (i * PAGE_SIZE);
        if mapping_set.contains(&paddr) {
            return false;
        }
    }
    for i in 0..num_pages {
        let paddr = start_paddr + (i * PAGE_SIZE);
        mapping_set.insert(paddr);
    }
    true
}
fn remove_dma_mapping(start_paddr: Paddr, num_pages: usize) {
    let mut mapping_set = DMA_MAPPING_SET.get().unwrap().lock_irq_disabled();
    start_paddr.checked_add(num_pages * PAGE_SIZE).unwrap();
    for i in 0..num_pages {
        let paddr = start_paddr + (i * PAGE_SIZE);
        mapping_set.remove(&paddr);
    }
}