ostd/mm/
mod.rs

1// SPDX-License-Identifier: MPL-2.0
2
3//! Virtual memory (VM).
4
5#![cfg_attr(
6    any(target_arch = "riscv64", target_arch = "loongarch64"),
7    expect(unused_imports)
8)]
9
10pub mod dma;
11pub mod frame;
12pub mod heap;
13pub mod io;
14pub mod io_util;
15pub(crate) mod kspace;
16pub(crate) mod mem_obj;
17pub(crate) mod page_prop;
18pub(crate) mod page_table;
19pub mod tlb;
20pub mod vm_space;
21
22#[cfg(ktest)]
23mod test;
24
25use core::fmt::Debug;
26
27pub use self::{
28    frame::{
29        Frame,
30        allocator::FrameAllocOptions,
31        segment::{Segment, USegment},
32        unique::UniqueFrame,
33        untyped::{AnyUFrameMeta, UFrame},
34    },
35    io::{
36        Fallible, FallibleVmRead, FallibleVmWrite, Infallible, PodAtomic, PodOnce, VmIo, VmIoFill,
37        VmIoOnce, VmReader, VmWriter,
38    },
39    kspace::{KERNEL_VADDR_RANGE, MAX_USERSPACE_VADDR},
40    mem_obj::{HasDaddr, HasPaddr, HasPaddrRange, HasSize, Split},
41    page_prop::{CachePolicy, PageFlags, PageProperty},
42    vm_space::VmSpace,
43};
44pub(crate) use self::{
45    kspace::paddr_to_vaddr,
46    page_prop::{PageTableFlags, PrivilegedPageFlags},
47    page_table::PageTable,
48};
49use crate::arch::mm::PagingConsts;
50
51/// Virtual addresses.
52pub type Vaddr = usize;
53
54/// Physical addresses.
55pub type Paddr = usize;
56
57/// Device addresses.
58pub type Daddr = usize;
59
60/// The level of a page table node or a frame.
61pub type PagingLevel = u8;
62
63/// A minimal set of constants that determines the paging system.
64/// This provides an abstraction over most paging modes in common architectures.
65pub(crate) trait PagingConstsTrait: Clone + Debug + Send + Sync + 'static {
66    /// The smallest page size.
67    /// This is also the page size at level 1 page tables.
68    const BASE_PAGE_SIZE: usize;
69
70    /// The number of levels in the page table.
71    /// The numbering of levels goes from deepest node to the root node. For example,
72    /// the level 1 to 5 on AMD64 corresponds to Page Tables, Page Directory Tables,
73    /// Page Directory Pointer Tables, Page-Map Level-4 Table, and Page-Map Level-5
74    /// Table, respectively.
75    const NR_LEVELS: PagingLevel;
76
77    /// The highest level that a PTE can be directly used to translate a VA.
78    /// This affects the the largest page size supported by the page table.
79    const HIGHEST_TRANSLATION_LEVEL: PagingLevel;
80
81    /// The size of a PTE.
82    const PTE_SIZE: usize;
83
84    /// The address width may be BASE_PAGE_SIZE.ilog2() + NR_LEVELS * IN_FRAME_INDEX_BITS.
85    /// If it is shorter than that, the higher bits in the highest level are ignored.
86    const ADDRESS_WIDTH: usize;
87
88    /// Whether virtual addresses are sign-extended.
89    ///
90    /// The sign bit of a [`Vaddr`] is the bit at index [`PagingConstsTrait::ADDRESS_WIDTH`] - 1.
91    /// If this constant is `true`, bits in [`Vaddr`] that are higher than the sign bit must be
92    /// equal to the sign bit. If an address violates this rule, both the hardware and OSTD
93    /// should reject it.
94    ///
95    /// Otherwise, if this constant is `false`, higher bits must be zero.
96    ///
97    /// Regardless of sign extension, [`Vaddr`] is always not signed upon calculation.
98    /// That means, `0xffff_ffff_ffff_0000 < 0xffff_ffff_ffff_0001` is `true`.
99    const VA_SIGN_EXT: bool;
100}
101
102/// The page size
103pub const PAGE_SIZE: usize = page_size::<PagingConsts>(1);
104
105/// The page size at a given level.
106pub(crate) const fn page_size<C: PagingConstsTrait>(level: PagingLevel) -> usize {
107    C::BASE_PAGE_SIZE << (nr_subpage_per_huge::<C>().ilog2() as usize * (level as usize - 1))
108}
109
110/// The number of sub pages in a huge page.
111pub(crate) const fn nr_subpage_per_huge<C: PagingConstsTrait>() -> usize {
112    C::BASE_PAGE_SIZE / C::PTE_SIZE
113}
114
115/// The number of base pages in a huge page at a given level.
116#[expect(dead_code)]
117pub(crate) const fn nr_base_per_page<C: PagingConstsTrait>(level: PagingLevel) -> usize {
118    page_size::<C>(level) / C::BASE_PAGE_SIZE
119}
120
121/// Checks if the given address is page-aligned.
122pub const fn is_page_aligned(p: usize) -> bool {
123    (p & (PAGE_SIZE - 1)) == 0
124}